The present invention relates to a computer system which includes a debugging assist unit for performing tracing operation for running one of plural operating systems adapted to run on the computer system.
In a virtual machine system, there are realized on a single computer system a plurality of virtual machines (referred to as VM in abbreviation) which are logical computers, wherein in each of the virtual machines or VMs an operating system or OS is allowed to run under the control of a virtual machine control program (hereinafter also referred to as VMCP in abbreviation), as is disclosed, for example, in U.S. Pat. No. 4,456,954. To this end, the virtual machine control program or VMCP assigns distributively resources of the real computer as well as resources logically generated by the VMCP itself to the individual virtual machines or VMs. With regard to a main storage, it is conceivable, for example, to divide a storage space of a physical main storage into a plurality of regions, wherein a plurality of adjacent regions forming a continuous storage area is assigned to a given one of the VMs as a main storage therefor or alternatively a virtual space generated by the VMCP by using a paging area may be assigned to a VM as the main storage. In any case, except for the VM which has consecutive areas starting from the 0-th address of the physical main storage, the address of a main storage on a VM designated as the absolute address by the OS running on the VM generally differs from the absolute address on the corresponding physical main storage.
In the system known heretofore, each of instruction processors is equipped with hardware referred to as the program event recording hardware or PER in abbreviation for issuing an interruption immediately after any one of particular program events designated previously by the OS has occurred, for the purpose of aiding in debugging a program. As the particular program events, there can be mentioned four events which follows:
(i) Event indicating that successful branching has been resulted from execution of a branch instruction resident at an area designated previously by an OS.
(ii) Event indicating that an instruction resident at an area designated previously by an OS has been executed.
(iii) Event indicating that data have been stored at an area designated previously by an OS.
(iv) Event indicating that a general register designated previously by an OS is updated or altered by an instruction resident at an area designated by the OS.
By making use of the program event recording hardware or PER, a program being developed can be debugged with a high efficiency, as described below.
Let's assume that a program developer issues to an OS a request for discontinuing execution of a program under development immediately after execution of an instruction stored in the program at a particular address thereof. In that case, the OS instructs to the program event recording PER that interrupt should occur upon execution of the instruction. This corresponds to the event (ii) mentioned above. Subsequently, in response to the interruption made by the program event recording PER, the OS discontinues the execution of the abovementioned program and informs the program developer of discontinuation of execution of the program by generating a message or other information on a display. In response to this message, the program developer confirms values of registers, field values of tables and others at the time of occurrence of the discontinuation of the program. When the values of register, field values of tables and others are found to be normal as the result of the confirmation, execution of the program is restarted, and operation of the program after the discontinuation is confirmed in succession.
On the other hand, when it is found at the time of discontinuation of execution of the program that abnormal values are stored in the tables of the program under development, then the program is again executed while monitoring the event (iii) mentioned previously. Thus, it is possible to limit the range of a defective portion of the program. Further, when an abnormal value is found to be stored in a general register upon discontinuation of execution of the program, the latter is executed again while monitoring the event (iv) mentioned previously. In this case, the range of defective portion of the program can be limited. Further, by executing again the program while monitoring the event (i), the program developer can know which path within the program executed results in the program defect, whereon he or she is capable of picking out the defective portion on the basis of the knowledge thus obtained.
In JP-A-H2-19937 (corresponding to Japanese Patent Application No. 170071/1988), there is disclosed an arrangement which makes it possible to use the program event recording PER also in a virtual machine system with a high efficiency. In case an operating system running on a VM is to be debugged, it is necessary that the virtual machine control program or VMCP controls the program event recording PER. On the other hand, when a program being developed under an operating system or OS is to be debugged, the OS itself is required to control the program event recording PER. Under the circumstance, the system disclosed in JP-A-H2-19937 is so arranged as to make available the debugging assist function of the program event recording PER selectively either for the VMCP or the running OS.
Further, JP-A-59-153246 discloses a debugging assist system which is so arranged as to store trace information in a physical main storage at a predetermined trace area immediately after occurrence of a particular program event. With this debugging assist system, an OS can recognize at one time a plurality of event occurrences without bringing about interruption. Thus, there can be realized the debugging assist function involving less overhead.
The prior art system disclosed in JP-A-59-153246 mentioned above is certainly advantageous in that a program under development can be debugged without interrupting the OS which is running. However, applicability of this system is limited only to a real computer system. In other words, this prior art system can not be applied, as it is, to a virtual machine system on which a plurality of operating system or OSs can run under the control of the virtual machine control program or VMCP, the reasons for which can be explained as follows.
(a) In the case of a real computer system which includes no virtual machine, the trace information useful for the debugging is directly stored at a trace area designated by an OS with an absolute address or physical address. In this conjunction, it will be noted that in the case of an OS adapted to run on a VM of a virtual machine system, the absolute address of a virtual main storage for the VM designated as the trace area by the OS is a virtual address for the real computer system. Consequently, it is impossible for the debugging assist unit or hardware to store directly or straightforwardly the trace information at the area of which address is designated by the operating system on the virtual machine.
(b) In the case of the real computer system, the trace information is stored at a trace area designated by the operating system or OS with the absolute address, as described above. Accordingly, there can not take place in the real computer system such situation in which the trace area is in the page-out state. In contrast, in the case of the virtual machine system, consideration has also to be paid to such situation where a trace area for an operating system on a given VM has been paged out to an auxiliary storage such as disk unit or the like by the virtual machine control program or VMCP. When an instruction of the OS is paged out by the VMCP in this manner, a page fault will be detected when an instruction processor is about to execute this instruction, as a result of which execution of the instruction is inhibited with the instruction being intercepted to the VMCP. In this case, the VMCP may first page in a page at which the instruction of OS is resident and execute the instruction again. However, in the case where the instruction of OS is in the page-in state while the trace area of the OS is paged out by the VMCP, the instruction which is subject to the monitoring will be executed completely without allowing to trace it. Consequently, even when the VMCP restarts the VM after having paged in the trace area of the OS, execution will be started from an instruction which succeeds to that to be monitored, which in turn means that one set of trace information will be lost.